1. Field of the Invention
The present invention relates to growth of semiconductor materials and devices, and, more particularly, to masked heteroepitaxial growth such as gallium arsenide on silicon dioxide masked silicon and devices in such heterosemiconductors.
2. Description of the Related Art.
Many researchers have investigated growth of semiconductordevice quality gallium arsenide (GaAs) on silicon wafers and fabrication of active devices in the GaAs. Such devices would combine the higher mobility of carriers in GaAs with the greater mechanical strength and thermal conductivity of a silicon substrate. For example, R. Fishcer et al, GaAs/AlGaAs Heterojunction Bipolar Transistors on Si Substrates, 1985 IEDM Tech. Digest 332, report GaAs/AlGaAs heterojunction bipolar transistors grown on silicon substrates and having current gains of .beta.=13 for a 0.2 .mu.m thick base. Similarly, G.Turner et al, Picosecond Photodetector Fabricated in GaAs Layers Grown on Silicon and Silicon On Sapphire Substrates, 1985 IEDM Tech. Digest 468, report response times of 60 picoseconds for photoconductive detectors fabricated in GaAs on silicon. These articles also note that majority carrier devices such as MESFETs fabricated in GaAs on silicon have performance approaching that of homoepitaxial devices; and this has encouraged efforts to integrate GaAs/AlGaAs optoelectronic and high-frequency devices and silicon devices on the same wafer to utilize high-data-rate optical interconnections to reduce the number of wire interconnections. Selective recrystallization of amorphous GaAs can use the high resistivity of noncrystalline GaAs; see, for example, A.Christour et al, Formation of (100) GaAs on (100) Silicon by Laser Recrystallization, 48 Appl. Phys. Lett. 1516 (1986).
One of the principal reasons for the increasing activity in the epitaxial growth of GaAs on silicon substrates is the prospect of monolithic integration of GaAs and Si devices in the same structure. In order to achieve this goal, however, it will be necessary to develop materials growth and device processing techniques that will permit the coexistence of circuit elements with vastly different fabrication requirements. One of the most promising of these approaches is the patterned growth of GaAs onto a silicon substrate through openings in a protective mask of either silicon nitride (Si.sub.3 N.sub.4) or silicon dioxide (SiO.sub.2). In this scheme, the fabrication of the silicon based devices (which typically require high temperature processing) would be completed prior to the deposition of a protective oxide or nitride overlayer. Single crystal GaAs could then be grown into lithographically defined holes in the overlayer, and GaAs device fabrication would follow.
Previous work has established that epitaxial GaAs can be successfully deposited onto silicon substrates through a patterning mask; see B. Y. Tsaur et al, 41 Appl Phys. Lett. 347 (1982), P. Sheldon et al, 45 Appl. Phys. Lett. 274 (1984), Daniele et al, U.S. Pat. No. 4,587,717, and Betsch et al, U.S. Pat. No. 4,551,394. In addition, the integration of Si and GaAs device structures via this technology has been demonstrated; see H. K. Choi et al, 7 IEEE Elec. Dev. Lett 241 (1986) and H. K. Choi et al, "Heteroepitaxy on Silicon", eds. J. C. C. Fan and J. M. Poate, 67 MRS Symposia Proceedings 165 (1986).
It is now well established that the differences in lattice parameters and thermal expansion coefficients between Si and GaAs creates an extensive network of dislocations that can limit the performance of GaAs devices. This situation would be exacerbated when the GaAs is deposited through holes in a mask onto a silicon surface by molecular beam epitaxy (MBE). Due to the nonselective nature of MBE growth, the single crystal GaAs regions would be in intimate contact with the polycrystalline GaAs that would grow on the amorphousmask material. The presence of this extra defective interface would naturally be expected to serve as a source for addition crystallographic defects. Similar effects are expected with other growth methods such as metalorganic chemical vapor deposition (MOCVD).
The simplest avenue for the patterned growth of GaAs on Si would involve the epitaxial growth of the GaAs onto the original planar silicon surface. However, the final level of the GaAs surface where device fabrication occurs may be several microns above the the level of prefabricated silicon devices. This situation would naturally complicate the interconnect of the two device structures by conventional metallization schemes. The obvious alternative is the deposition of the GaAs into etched trenches in the original silicon substrate. While this scheme simplifies device processing, it would require that the GaAS occur on the bottom of an etched trench. Several studies have demonstrated the sensitivity of epitaxial GaAs to the orientation of the silicon substrate; see Y. Kajikawa et al, 18th conference on Solid State Devices and Materials (Extended Abstratcts), 125 (1986), T. Ueda et al, 25 Japan, J. Appl. Phys. L789 (1986), and J. W. Lee, in "Heteroepitaxy on Silicon", eds. J. C. C. Fan and J. M. Poate, 67 MRS Symposia Proceedings 29 (1986). Thus it would be anticipated that the growth of GaAs in an etched trench may lead to a degradation of the structural and electrical parameters of the GaAs crystal. Furthermore, the competition between growth from the trench floor and sidewall could serve as an additional source of structural defects.